Detailed Description

The MAX1236–MAX1239 analog-to-digital converters

(ADCs) use successive-approximation conversion tech-

niques and fully differential input track/hold (T/H) cir-

cuitry to capture and convert an analog signal to a

serial 12-bit digital output. The MAX1236/MAX1237 are

4-channel ADCs, and the MAX1238/MAX1239 are 12-

channel ADCs. These devices feature a high-speed, 2-

wire serial interface supporting data rates up to 1.7MHz.

Figure 2 shows the simplified internal structure for the

MAX1238/MAX1239.

Power Supply

The MAX1236–MAX1239 operates from a single supply

and consumes 670µA (typ) at sampling rates up to

94.4ksps. The MAX1237/MAX1239 feature a 2.048V

internal reference and the MAX1236/MAX1238 feature

a 4.096V internal reference. All devices can be config-

Analog Input and Track/Hold

The MAX1236–MAX1239 analog-input architecture con-

tains an analog-input multiplexer (mux), a fully differen-

tial track-and-hold (T/H) capacitor, T/H switches, a

comparator, and a fully differential switched capacitive

digital-to-analog converter (DAC) (Figure 4).

In single-ended mode, the analog input multiplexer con-

CS[3:0] (see the Configuration Setup Bytes section) and

GND (Table 3). In differential mode, the analog-input

inputs selected by CS[3:0] (Table 4).

During the acquisition interval, the T/H switches are in

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,

4-/12-Channel, 2-Wire Serial, 12-Bit ADCs

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9

ANALOG

INPUT

MUX

AIN1

AIN11/REF

AIN2

AIN3

AIN4

AIN5

AIN6

AIN7

AIN8

AIN9

AIN10

AIN0

SCL

SDA

INPUT SHIFT REGISTER

SETUP REGISTER

CONFIGURATION REGISTER

CONTROL

LOGIC

REFERENCE

4.096V (MAX1238)

2.048V (MAX1239)

INTERNAL

OSCILLATOR

OUTPUT SHIFT

REGISTER

AND RAM

REF

T/H

12-BIT

ADC

GND

MAX1238

MAX1239

Figure 2. MAX1238/MAX1239 Simplified Functional Diagram

400pF

SDA

Figure 3. Load Circuit