Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

FT313HQ-R Datasheet(PDF) 46 Page - List of Unclassifed Manufacturers

Part # FT313HQ-R
Description  Future Technology Devices International Ltd
PDF  67 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ETC2 [List of Unclassifed Manufacturers]
Direct Link  
Logo ETC2 - List of Unclassifed Manufacturers

FT313HQ-R Datasheet(HTML) 46 Page - List of Unclassifed Manufacturers

Back Button FT313HQ-R Datasheet HTML 42Page - List of Unclassifed Manufacturers FT313HQ-R Datasheet HTML 43Page - List of Unclassifed Manufacturers FT313HQ-R Datasheet HTML 44Page - List of Unclassifed Manufacturers FT313HQ-R Datasheet HTML 45Page - List of Unclassifed Manufacturers FT313HQ-R Datasheet HTML 46Page - List of Unclassifed Manufacturers FT313HQ-R Datasheet HTML 47Page - List of Unclassifed Manufacturers FT313HQ-R Datasheet HTML 48Page - List of Unclassifed Manufacturers FT313HQ-R Datasheet HTML 49Page - List of Unclassifed Manufacturers FT313HQ-R Datasheet HTML 50Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 46 / 67 page
background image
Copyright © 2013 Future Technology Devices International Limited
46
Document No.: FT_000589
FT313H USB2.0 HS Host Controller Datasheet Version 1.2
Clearance No.: FTDI# 318
6.4 Timing
6.4.1 PIO timing
SRAM PIO timing characteristics (Ambient Temperature = -40°C to +85°C)
Parameter
Description
VCC(I/O)=1.8V
VCC(I/O)=2.5V
VCC(I/O)=3.3V
Unit
Min
Max
Min
Max
Min
Max
Tcs
CS_N setup time
before WR_N / RD_N
low
0
-
0
-
0
-
ns
Tch
CS_N hold time after
WR_N / RD_N high
0
-
0
-
0
-
ns
Tcp
CS_N pulse width for
read
40
-
40
-
40
-
ns
CS_N pulse width for
write
40
-
40
-
40
-
ns
Tasrw
address setup time
before WR_N / RD_N
low
0
-
0
-
0
-
ns
Tahrw
Address Hold Time
after WR_N/RD_N
LOW
0
-
0
-
0
-
ns
Tap
Address Latch Pulse
Width
ns
Twc
Write Cycle Time
80
-
79
-
78.5
-
ns
Twp
WR_N Pulse Width
40
-
40
-
40
-
ns
Tdh
RD_N High to Output
Hi-Z
4
9
4
7
4
6
ns
WR_N High to Input
Hi-Z
0
-
0
-
0
-
ns
Tdadvh
DATA Setup Time
before DATA Latch
6
-
6
-
6
-
ns
Toe
RD_N Low to DATA
Output Enable
8
-
7
-
6
-
ns
Trp
RD_N Pulse Width
40
-
40
-
40
-
ns
Trc
Read Cycle Time
80
-
79.5
-
79
-
ns
Table 6-10 SRAM PIO timing



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link to Datasheet   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com