AD9873JS datasheet(20/39 Pages) AD

20 / 39 page

REV. 0

AD9873

–20–

THEORY OF OPERATION

To gain a general understanding of the AD9873 it is helpful

to refer to Figure 1, which displays a block diagram of the device

MUX

AD9873

I INPUT

Q INPUT

IF10 INPUT

IF12 INPUT

VIDEO INPUT

ADC

DAC

(fOSCIN)

MUX

REF-8

REF-10

REF-12

CLAMP LEVEL

CONTROL WORD 0

CONTROL WORD 1

OSC IN

MULTIPLIER

M = 1,2,.......,31

DAC

MUX

INV

SINC

SIN

COS

DDS

R = 2,3,.......,63

N = 3,4

(fMCLK)(fIQCLK)

DATA

ASSEMBLER

HALF-BAND

FILTER #1

HALF-BAND

FILTER #2

CIC

FILTER

QUADRATURE

MODULATOR

AD832x CTRL

BURST PROFILE

CTRL

SERIAL

INTERFACE

Rx - ITF

SDELTA1

SDELTA0

OSC IN

XTAL

FSADJ

Tx IQ

Tx SYNC

MCLK

REF CLK

Rx IQ

Rx SYNC

Rx IF

INV SINC

BYPASS

(fOSCIN)

(fSYSCLK)

Figure 1. Block Diagram

architecture. The following is a general description of the device

functionality. Later sections will detail each of the data path build-

ing blocks.

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