M24LR64-R-DW6TSLASH2 datasheet(14/126 Pages) STMICROELECTRONICS

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Signal description

M24LR64-R

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Doc ID 15170 Rev 8

Signal description

2.1

Serial Clock (SCL)

This input signal is used to strobe all data in and out of the device. In applications where this

signal is used by slave devices to synchronize the bus to a slower clock, the bus master

must have an open drain output, and a pull-up resistor must be connected from Serial Clock

(SCL) to VCC. (Figure 4 indicates how the value of the pull-up resistor can be calculated). In

most applications, though, this method of synchronization is not employed, and so the pull-

up resistor is not necessary, provided that the bus master has a push-pull (rather than open

drain) output.

2.2

Serial Data (SDA)

This bidirectional signal is used to transfer data in or out of the device. It is an open drain

output that may be wire-OR’ed with other open drain or open collector signals on the bus. A

pull up resistor must be connected from Serial Data (SDA) to VCC. (Figure 4 indicates how

the value of the pull-up resistor can be calculated).

2.3

Chip Enable (E0, E1)

These input signals are used to set the value that is to be looked for on the two least

significant bits (b2, b1) of the 7-bit device select code. These inputs must be tied to VCC or

VSS, to establish the device select code as shown in Figure 3. When not connected (left

floating), these inputs are read as low (0,0).

Figure 3.

Device select code

2.4

Antenna coil (AC0, AC1)

These inputs are used to connect the device to an external coil. When correctly tuned, the

coil is used to power and access the device using the ISO 15693 and ISO 18000-3 mode 1

protocols.

2.5

VSS ground

VSS is the reference for the VCC supply voltage.

Ai12806

VCC

M24xxx

VSS

VCC

M24xxx

VSS

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