| Electronic Components Datasheet Search |
|
M30620FCAFP Datasheet(PDF) 381 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
M30620FCAFP Datasheet(HTML) 381 Page - Renesas Technology Corp |
|
381 / 615 page ![]() Clock-Synchronous Serial I/O Mitsubishi microcomputers M16C / 62A Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 2-64 2.4.3 Operation of the Serial I/O (transmission in clock-synchronous serial I/O mode, transfer clock output from multiple pins function selected) Note 1: This can be selected only when UART1 is used in combination with the internal clock. When this function is _______ _______ _______ _______ selected, UART1 CTS/RTS function can not be utilized. Set the UART1 CTS/RTS disable bit to “1”. Note 2: UART2 only. (1) Setting the transmit enable bit to “1” makes data transmissible status ready. (2) When transmission data is written to the UART1 transmit buffer register, transmission data held in the UART1 transmit buffer register is transmitted to the UART1 transmit register in synchronization with the first falling edge of the transfer clock. At this time, the first bit of the transmission data is transmitted from the TxD1 pin. Then the data is transmitted bit by bit from the lower order in synchronization with the falling edges of the transfer clock. (3) When transmission of 1-byte data is completed, the transmit register empty flag goes to “1”, which indicates that the transmission is completed. The transfer clock stops at “H” level. At this time, the UART1 transmit interrupt request bit goes to “1”. (4) Setting CLK/CLKS select bit 1 to “1” and setting CLK/CLKS select bit 0 to “1” causes the CLKS1 pin to go to the transfer clock output pin. Change the transfer clock output pin when transmission is halted. Operation Item Item Set-up Set-up Transfer clock source CLK polarity Internal clock (f1 / f8 / f32) External clock (CLKi pin) CTS function CTS function enabled CTS function disabled Output transmission data at the falling edge of the transfer clock Output transmission data at the rising edge of the transfer clock O O O Transmission interrupt factor Transmission buffer empty Transmission complete Output transfer clock to multiple pins (Note 1) Not selected Selected O O Transfer clock LSB first MSB first O Data logic select function (Note 2) No reverse Reverse O TXD, RXD I/O polarity reverse bit (Note 2) No reverse Reverse O In transmitting data in clock-synchronous serial I/O mode, choose functions from those listed in Table 2.4.2. Operations of the circled items are described below. Figure 2.4.10 shows the operation timing, and Figures 2.4.11 and 2.4.12 show the set-up procedures. Table 2.4.2. Choosed functions |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |