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M30620FCAFP Datasheet(PDF) 383 Page - Renesas Technology Corp |
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M30620FCAFP Datasheet(HTML) 383 Page - Renesas Technology Corp |
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383 / 615 page ![]() Clock-Synchronous Serial I/O Mitsubishi microcomputers M16C / 62A Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 2-66 Internal/external clock select bit 0 : Internal clock Setting UART1 transmit/receive mode register UART1 transmit/receive mode register [Address 03A816] U1MR Invalid in clock synchronous I/O mode Must be fixed to “001” b7 b0 01 00 0 Invalid in clock synchronous I/O mode Invalid in clock synchronous I/O mode Sleep select bit Must always be “0” in clock synchronous I/O mode Setting UART1 transmit/receive control register 0 UART1 transmit/receive control register 0 [Address 03AC16] U1C0 CLK polarity select bit 0 : Transmission data is output at falling edge of transfer clock and reception data is input at rising edge b7 b0 1 00 BRG count source select bit 0 0 : f1 is selected 0 1 : f8 is selected 1 0 : f32 is selected 1 1 : Must not be set b1 b0 Valid when bit 4 = “0” Data output select bit 0 : TXDi pin is CMOS output 1 : TxDi pin is N-channel open-drain output CTS/RTS disable bit 1 : CTS/RTS function disabled Transmit register empty flag 0 : Data present in transmit register (during transmission) 1 : No data present in transmit register (transmission completed) Transfer format select bit 0 : LSB first Continued to the next page Setting UART transmit/receive control register 2 UART transmit/receive control register 2 [Address 03B016] UCON CLK/CLKS select bit 1 1 : Transfer clock output from multiple pins function selected UART0 transmit interrupt cause select bit 1 : Transmission completed (TXEPT = 1) CLK/CLKS select bit 0 0 : Clock output to CLK1 1 : Clock output to CLKS1 Reserved bit Must always be set to “0” b7 b0 1 1 0 Figure 2.4.11. Set-up procedure of transmission in clock-synchronous serial I/O mode, transfer clock output from multiple pins function selected (1) |
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