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H8SX1663 Datasheet(PDF) 629 Page - Renesas Technology Corp

Part # H8SX1663
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 Datasheet(HTML) 629 Page - Renesas Technology Corp

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Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.1.00 Jun. 07, 2006 Page 577 of 1102
REJ09B0294-0100
10.10.7
Conflict between Buffer Register Write and Compare Match
If a compare match occurs in the T2 state of a TGR write cycle, the data transferred to TGR by the
buffer operation will be the write data.
Figure 10.49 shows the timing in this case.
TGR
Compare match
signal
P
φ
N
Address
Write
T
1
T
2
M
TGR write cycle
Buffer register
address
Data written to buffer register
M
Buffer register
Figure 10.49 Conflict between Buffer Register Write and Compare Match



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