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HD6432138SW Datasheet(PDF) 206 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 206 Page - Renesas Technology Corp |
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206 / 1061 page ![]() Section 6 Bus Controller Rev. 4.00 Jun 06, 2006 page 152 of 1004 REJ09B0301-0400 By program wait T1 Address bus φ AS (IOSE = 0) RD Data bus Read data Read WR Write data Write Note: indicates the timing of WAIT pin sampling using the φ clock. WAIT Data bus T2 Tw Tw Tw T3 By WAIT pin Figure 6.7 Example of Wait State Insertion Timing The settings after a reset are: 3-state access, insertion of 3 program wait states, and WAIT input disabled. |
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