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HD6432138SW Datasheet(PDF) 534 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 534 Page - Renesas Technology Corp |
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534 / 1061 page ![]() Section 16 I 2C Bus Interface [H8S/2138 Group Option] Rev. 4.00 Jun 06, 2006 page 480 of 1004 REJ09B0301-0400 Bit 0—Acknowledge Bit (ACKB): Stores acknowledge data. In transmit mode, after the receiving device receives data, it returns acknowledge data, and this data is loaded into ACKB. In receive mode, after data has been received, the acknowledge data set in this bit is sent to the transmitting device. When this bit is read, in transmission (when TRS = 1), the value loaded from the bus line (returned by the receiving device) is read. In reception (when TRS = 0), the value set by internal software is read. When this bit is written to, the acknowledge data transmitted at the receipt is rewritten regardless of the TRS value. The data loaded from the receiving device is retained, therefore take care of using bit-manipulation instructions. Bit 0 ACKB Description 0 Receive mode: 0 is output at acknowledge output timing (Initial value) Transmit mode: Indicates that the receiving device has acknowledged the data (signal is 0) 1 Receive mode: 1 is output at acknowledge output timing Transmit mode: Indicates that the receiving device has not acknowledged the data (signal is 1) 16.2.7 Serial Timer Control Register (STCR) Bit Initial value Read/Write 7 — 0 R/W 6 IICX1 0 R/W 5 IICX0 0 R/W 4 IICE 0 R/W 3 FLSHE 0 R/W 0 ICKS0 0 R/W 2 — 0 R/W 1 ICKS1 0 R/W STCR is an 8-bit readable/writable register that controls register access, the I 2C interface operating mode (when the on-chip IIC option is included), and on-chip flash memory (F-ZTAT versions), and selects the TCNT input clock source. For details of functions not related to the I 2C bus interface, see section 3.2.4, Serial Timer Control Register (STCR), and the descriptions of the relevant modules. If a module controlled by STCR is not used, do not write 1 to the corresponding bit. STCR is initialized to H'00 by a reset and in hardware standby mode. Bit 7—Reserved: Do not write 1 to this bit. |
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