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HD6432138SW Datasheet(PDF) 446 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 446 Page - Renesas Technology Corp |
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446 / 1061 page  Section 15 Serial Communication Interface (SCI, IrDA) Rev. 4.00 Jun 06, 2006 page 392 of 1004 REJ09B0301-0400 15.2 Register Descriptions 15.2.1 Receive Shift Register (RSR) 7 — 6 — 5 — 4 — 3 — 0 — 2 — 1 — Bit Read/Write RSR is a register used to receive serial data. The SCI sets serial data input from the RxD pin in RSR in the order received, starting with the LSB (bit 0), and converts it to parallel data. When one byte of data has been received, it is transferred to RDR automatically. RSR cannot be directly read or written to by the CPU. 15.2.2 Receive Data Register (RDR) 7 0 R 6 0 R 5 0 R 4 0 R 3 0 R 0 0 R 2 0 R 1 0 R Bit Initial value Read/Write RDR is a register that stores received serial data. When the SCI has received one byte of serial data, it transfers the received serial data from RSR to RDR where it is stored, and completes the receive operation. After this, RSR is receive-enabled. Since RSR and RDR function as a double buffer in this way, continuous receive operations can be performed. RDR is a read-only register, and cannot be written to by the CPU. RDR is initialized to H'00 by a reset, and in standby mode, watch mode, subactive mode, subsleep mode, and module stop mode. |
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