HD6432138SW datasheet(442/1061 Pages) RENESAS

442 / 1061 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 4.00 Jun 06, 2006 page 388 of 1004

REJ09B0301-0400

 One serial data transfer format

Data length: 8 bits

 Receive error detection: Overrun errors detected

• Full-duplex communication capability

 The transmitter and receiver are mutually independent, enabling transmission and reception

to be executed simultaneously

 Double-buffering is used in both the transmitter and the receiver, enabling continuous

transmission and continuous reception of serial data

• LSB-first or MSB-first transfer can be selected

 This selection can be made regardless of the communication mode (with the exception of

7-bit data transfer in asynchronous mode)*

Note: *

LSB-first transfer is used in the examples in this section.

• On-chip baud rate generator allows any bit rate to be selected

• Choice of serial clock source: internal clock from baud rate generator or external clock from

SCK pin

• Capability of transmit and receive clock output

 The P86/SCK1 and P42/SCK2 pins are CMOS type outputs

 The P52/SCK0 pin is an NMOS push-pull type output in the H8S/2138 Group and a

CMOS output in the H8S/2134 Group (When the P52/SCK0 pin is used as an output in the

H8S/2138 Group, external pull-up resistor must be connected in order to output high level)

• Four interrupt sources

 Four interrupt sources (transmit-data-empty, transmit-end, receive-data-full, and receive

error) that can issue requests independently

 The transmit-data-empty interrupt and receive-data-full interrupt can activate the data

transfer controller (DTC) to execute data transfer

HD6432138SW Datasheet(PDF) 442 Page - Renesas Technology Corp