HD6432138SW datasheet(417/1061 Pages) RENESAS

417 / 1061 page

Section 13 Timer Connection [H8S/2138 Group]

Rev. 4.00 Jun 06, 2006 page 363 of 1004

REJ09B0301-0400

Table 13.7

Examples of TCORB, TCR, and TCSR Settings

Bit(s)

Abbreviation

Contents

Description

7CMIEB

6CMIEA

5OVIE

Interrupts due to compare-match and

overflow are disabled

4 and 3

CCLR1,

CCLR0

TCNT is cleared by the rising edge of the

external reset signal (inverse of the IVI

signal)

TCR in

TMR1

2 to 0

CKS2 to CKS0

101

TCNT is incremented on the rising edge

of the external clock (IHI signal)

0011

Not changed by compare-match B;

output inverted by compare-match A

(toggle output)

TCSR in

TMR1

3 to 0

OS3 to OS0

1001

when TCORB

≤ TCORA, 1 output on

compare-match B, 0 output on compare-

match A

TOCRB in TMR1

H'03

(example)

Compare-match on the 4th (example)

rise of the IHI signal after the rise of the

inverse of the IVI signal

TCNT

TCNT = TCORB (3)

IHI signal

IVI signal (PDC signal)

IVO signal

(without fall modification,

with IHI synchronization)

IVO signal

(with fall modification,

without IHI synchronization)

IVO signal

(with fall modification

and IHI synchronization)

Figure 13.7 Fall Modification/IHI Synchronization Timing Chart

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