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HD6432138SW Datasheet(PDF) 406 Page - Renesas Technology Corp

Part # HD6432138SW
Description  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1061 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432138SW Datasheet(HTML) 406 Page - Renesas Technology Corp

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Section 13 Timer Connection [H8S/2138 Group]
Rev. 4.00 Jun 06, 2006 page 352 of 1004
REJ09B0301-0400
Bit 7—VSYNCI Edge (VEDG): Detects a rising edge on the VSYNCI pin.
Bit 7
VEDG
Description
0
[Clearing condition]
(Initial value)
When 0 is written in VEDG after reading VEDG = 1
1
[Setting condition]
When a rising edge is detected on the VSYNCI pin
Bit 6—HSYNCI Edge (HEDG): Detects a rising edge on the HSYNCI pin.
Bit 6
HEDG
Description
0
[Clearing condition]
(Initial value)
When 0 is written in HEDG after reading HEDG = 1
1
[Setting condition]
When a rising edge is detected on the HSYNCI pin
Bit 5—CSYNCI Edge (CEDG): Detects a rising edge on the CSYNCI pin.
Bit 5
CEDG
Description
0
[Clearing condition]
(Initial value)
When 0 is written in CEDG after reading CEDG = 1
1
[Setting condition]
When a rising edge is detected on the CSYNCI pin
Bit 4—HFBACKI Edge (HFEDG): Detects a rising edge on the HFBACKI pin.
Bit 4
HFEDG
Description
0
[Clearing condition]
(Initial value)
When 0 is written in HFEDG after reading HFEDG = 1
1
[Setting condition]
When a rising edge is detected on the HFBACKI pin



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