CC2400-RTR1 datasheet(12/83 Pages) TI

12 / 83 page

CC2400

SWRS042A

Page 12 of 83

Parameter

Min.

Typ.

Max.

Unit

Condition / Note

PLL lock time (RX / TX turn-on

time)

µs

Until within ± 10 kHz

Step size is 1MHz, no calibration.

Note: Calibration should be

performed for frequency changes

> 8 MHz.

PLL turn-on time from IDLE mode,

crystal oscillator on

100

µs

Crystal oscillator running.

Calibration time included.

Table 8 Frequency synthesizer characteristics

13 Digital Inputs/Outputs

Parameter

Min.

Typ.

Max.

Unit

Condition / Note

Signal levels are referred to the

voltage level at the pin DVDD3.3.

Logic "0" input voltage

0.3*

DVDD

Logic "1" input voltage

0.7*

DVDD

Logic "0" output voltage

0.4

Output current −8 mA,

3.3 V supply voltage

Logic "1" output voltage

2.5

DVDD

Output current 8 mA,

3.3 V supply voltage

Logic "0" input current

−1

µA

Input signal equals GND

Logic "1" input current

µA

Input signal equals DVDD

DIO setup time

TX un-buffered mode, minimum

time DIO must be ready before

the positive edge of DCLK

DIO hold time

TX un-buffered mode, minimum

time DIO must be held after the

positive edge of DCLK

Serial interface (SCLK, SI, SO and

CSn) timing specification

See Table 12 page 22

Table 9 Digital input/output characteristics

CC2400-RTR1 Datasheet(PDF) 12 Page - Texas Instruments

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