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TLV9152SIRUGR Datasheet(PDF) 8 Page - Texas Instruments |
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TLV9152SIRUGR Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 77 page ![]() 1 OUT1 14 OUT4 2 IN1± 13 IN4± 3 IN1+ 12 IN4+ 4 V+ 11 V± 5 IN2+ 10 IN3+ 6 IN2± 9 IN3± 7 OUT2 8 OUT3 Not to scale Figure 5-7. TLV9154 D, PW, and DYY Packages 14-Pin SOIC, TSSOP, and SOT-23 (Top View) 1 IN1± 2 IN1+ 3 V+ 4 IN2+ 5 IN2± 8 IN3± 9 IN3+ 10 V± 11 IN4+ 12 IN4± Not to scale Figure 5-8. TLV9154 RUC Package 14-Pin X2QFN (Top View) Table 5-5. Pin Functions: TLV9154 PIN I/O DESCRIPTION NAME SOIC, TSSOP, SOT-23 X2QFN IN1+ 3 2 I Noninverting input, channel 1 IN1– 2 1 I Inverting input, channel 1 IN2+ 5 4 I Noninverting input, channel 2 IN2– 6 5 I Inverting input, channel 2 IN3+ 10 9 I Noninverting input, channel 3 IN3– 9 8 I Inverting input, channel 3 IN4+ 12 11 I Noninverting input, channel 4 IN4– 13 12 I Inverting input, channel 4 NC — — — Do not connect OUT1 1 14 O Output, channel 1 OUT2 7 6 O Output, channel 2 OUT3 8 7 O Output, channel 3 OUT4 14 13 O Output, channel 4 V+ 4 3 — Positive (highest) power supply V– 11 10 — Negative (lowest) power supply TLV9151, TLV9152, TLV9154 SBOS986E – OCTOBER 2019 – REVISED JANUARY 2022 www.ti.com 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TLV9151 TLV9152 TLV9154 |
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