TLV9152SIRUGR datasheet(13/63 Pages) TI

13 / 63 page

TLV9151, TLV9152, TLV9154

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SBOS986B – OCTOBER 2019 – REVISED MAY 2020

Product Folder Links: TLV9151 TLV9152 TLV9154

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Electrical Characteristics (continued)

For VS = (V+) – (V–) = 2.7 V to 16 V (±1.35 V to ±8 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT =

VS / 2, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

(2)

Disable time (tOFF) and enable time (tON) are defined as the time interval between the 50% point of the signal applied to the SHDN pin

and the point at which the output voltage reaches the 10% (disable) or 90% (enable) level.

FREQUENCY RESPONSE

GBW

Gain-bandwidth product

4.5

MHz

Slew rate

VS = 16 V, G = +1, CL = 20 pF

V/μs

Settling time

To 0.01%, VS = 16 V, VSTEP = 10 V , G = +1, CL = 20 pF

2.5

μs

To 0.01%, VS = 16 V, VSTEP = 2 V , G = +1, CL = 20 pF

1.5

To 0.1%, VS = 16 V, VSTEP = 10 V , G = +1, CL = 20 pF

To 0.1%, VS = 16 V, VSTEP = 2 V , G = +1, CL = 20 pF

Phase margin

G = +1, RL = 10 kΩ

Overload recovery time

VIN × gain > VS

600

THD+N

Total harmonic distortion

+ noise

VS = 16 V, VO = 3 VRMS, G = 1, f = 1 kHz

0.0001%

OUTPUT

Voltage output swing

from rail

Positive and negative rail headroom

VS = 16 V, RL = no load

(1)

VS = 16 V, RL = 10 kΩ

VS = 16 V, RL = 2 kΩ

200

250

VS = 2.7 V, RL = no load

(1)

VS = 2.7 V, RL = 10 kΩ

VS = 2.7 V, RL = 2 kΩ

ISC

Short-circuit current

±75

CLOAD

Capacitive load drive

1000

Open-loop output

impedance

f = 1 MHz, IO = 0 A

400

Ω

POWER SUPPLY

Quiescent current per

amplifier

IO = 0 A

560

685

µA

TA = –40°C to 125°C

735

SHUTDOWN

IQSD

Quiescent current per

amplifier

VS = 2.7 V to 40 V, all amplifiers disabled, SHDN = V–

µA

ZSHDN

Output impedance

during shutdown

VS = 2.7 V to 40 V, amplifier disabled

10 || 2

GΩ || pF

VIH

Logic high threshold

voltage (amplifier

enabled)

(V–) + 1.1

VIL

Logic low threshold

voltage (amplifier

disabled)

(V–) + 0.2

tON

Amplifier enable

time (2)

G = +1, VCM = V-, VO = 0.1 × VS/2

µs

tOFF

Amplifier disable time (2)

VCM = V-, VO = VS/2

µs

SHDN pin input bias

current (per pin)

VS = 2.7 V to 40 V, (V+) ≥ SHDN ≥ (V–) + 0.9 V

500

VS = 2.7 V to 40 V, (V–) ≤ SHDN ≤ (V–) + 0.7 V

150

TLV9152SIRUGR Datasheet(PDF) 13 Page - Texas Instruments

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