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DS31256 Datasheet(PDF) 158 Page - Maxim Integrated Products

Part # DS31256
Description  256-Channel, High-Throughput HDLC Controller
PDF  183 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS31256 Datasheet(HTML) 158 Page - Maxim Integrated Products

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DS31256 256-Channel, High-Throughput HDLC Controller
158 of 183
Figure 11-8. 16-Bit Write (Only Upper 8 Bits Active) Cycle
Intel Mode (LIM = 0)
Arbitration Disabled (LARBE = 0)
Bus Transaction Time = Timed from
LRDY (LRDY = 0000)
LCLK
LA[19:0]
LD[7:0]
LD[15:8]
LWR
LRD
Address Valid
LBHE
LRDY
Data Valid
123456
7
8
9
10
Note: The
LRDY signal must be detected by the 9th LCLK or the bus access attempted by the host is unsuccessful and the
LBE status bit is set.



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