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EM351-RTR Datasheet(PDF) 28 Page - Silicon Laboratories |
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EM351-RTR Datasheet(HTML) 28 Page - Silicon Laboratories |
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28 / 241 page ![]() 28 Rev 1.3 Figure 5.1. EM351 ARM® CortexTM-M3 Memory Map Main Flash Block (128kB) Lower mapping (Normal Mode) 0x00000000 0x0001FFFF RAM (12kB) mapped onto System interface 0x20000000 0x20002FFF RAM bit band alias region mapped onto System interface (not used) 0x22000000 0x22002000 Flash RAM Peripheral Registers mapped onto System interface Register bit band alias region mapped onto System interface (not used) 0x40000000 0x40000XXX 0x42000000 0x42002XXX Not used Private periph bus (internal) Not used Private periph bus (external) Not used Not used Not used 0xE0000000 ITM DWT FPB NVIC TPIU ROM table 0xE0001000 0xE0002000 0xE0003000 0xE000E000 0xE000F000 0xE003FFFF 0xE0040000 0xE0041000 0xE0042000 0xE00FF000 0xE00FFFFF Fixed Info Block (2kB) 0x08040000 0x080407FF 0x08040FFF 0x08040800 Main Flash Block (128kB) Upper mapping (Boot mode) 0x08000000 0x0801FFFF Fixed Info Block (2kB) Optional boot mode maps Fixed Info Block to the start of memory 0x000007FF Not used Not used Customer Info Block (2kB) |
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