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FT313HQ-R Datasheet(PDF) 26 Page - Future Technology Devices International Ltd. |
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FT313HQ-R Datasheet(HTML) 26 Page - Future Technology Devices International Ltd. |
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26 / 67 page ![]() Copyright © 2013 Future Technology Devices International Limited 26 Document No.: FT_000589 FT313H USB2.0 HS Host Controller Datasheet Version 1.2 Clearance No.: FTDI# 318 5.2.7 FRINDEX register (address = 1Ch) This register is used by the host controller to index into the periodic frame. The register updates very 125 microseconds (one each micro-frame). Bit Name Type Default value Description [31:14] Reserved RO 28’h0 - [13:0] FRINDEX R/W 14’b0 Frame Index This register is used by the host controller to index the frame into the Periodic Frame List. It updates every 125 microseconds. This register cannot be written unless the host controller is at the halted state. Bits[N:3] are used for Frame List current index. This means that each location of the frame list is accessed 8 times before moving to the next index. USBCMD[Frame List Size] Number Elements N 00b (1024) 12 01b (512) 11 10b (256) 10 11b Reserved Table 5-8 Frame index register 5.2.8 PERIODICLISTADDR register (address = 24h) This 32-bit register contains the beginning address of the periodic frame list in the system memory. Bit Name Type Default value Description [31:12] PERI_BASEADR R/W 20’h0 Periodic Frame List Base Address This 32-bit register contains the beginning address of the Periodic Frame List in the system memory. These bits correspond to the memory address signals[31:12]. [11:0] Reserved RO 12’b0 - Table 5-9 Periodic frame list base address register 5.2.9 ASYNCLISTADDR register (address = 28h) This 32-bit register contains the address of the next asynchronous queue head to be executed. Bit Name Type Default value Description [31:5] ASYNC_LADR R/W 27’h0 Current Asynchronous List Address This 32-bit register contains the address of the next asynchronous queue head to be executed. These bits correspond to the memory address signals [31:5]. [4:0] Reserved RO 5’b0 - Table 5-10 Current asynchronous list address register |
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