STM32L072KB datasheet(36/147 Pages) STMICROELECTRONICS

36 / 147 page

Functional overview

STM32L072xx

36/147

DocID027100 Rev 3

3.17.5

Universal serial bus (USB)

The STM32L072xx embeds a full-speed USB device peripheral compliant with the USB

specification version 2.0. The internal USB PHY supports USB FS signaling, embedded DP

pull-up and also battery charging detection according to Battery Charging Specification

Revision 1.2. The USB interface implements a full-speed (12 Mbit/s) function interface with

added support for USB 2.0 Link Power Management. It has software-configurable endpoint

setting with packet memory up to 1 KB and suspend/resume support. It requires a precise

48 MHz clock which can be generated from the internal main PLL (the clock source must

use a HSE crystal oscillator) or by the internal 48 MHz oscillator in automatic trimming

mode. The synchronization for this oscillator can be taken from the USB data stream itself

(SOF signalization) which allows crystal-less operation.

3.18

Clock recovery system (CRS)

The STM32L072xx embeds a special block which allows automatic trimming of the internal

48 MHz oscillator to guarantee its optimal accuracy over the whole device operational

range. This automatic trimming is based on the external synchronization signal, which could

be either derived from USB SOF signalization, from LSE oscillator, from an external signal

on CRS_SYNC pin or generated by user software. For faster lock-in during startup it is also

possible to combine automatic trimming with manual trimming action.

3.19

Cyclic redundancy check (CRC) calculation unit

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

configurable generator polynomial value and size.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at

linktime and stored at a given memory location.

3.20

Serial wire debug port (SW-DP)

An ARM SW-DP interface is provided to allow a serial wire debugging tool to be connected

to the MCU.

Table 14. SPI/I2S implementation

SPI features(1)

1. X = supported.

SPI1

SPI2

Hardware CRC calculation

I2S mode

TI mode

STM32L072KB Datasheet(PDF) 36 Page - STMicroelectronics

STM32L072KB Datasheet(HTML) 36 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL