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STLC2410B

Figure 4. USB Interface

The USB device registers and FIFOs are memory mapped. The USB Driver will use these registers to ac-

cess the USB interface. The equivalent exists for the HCI communication over UART.

For transmission to the host, the USB & Serial Drivers interface with the HW via a set of registers and

FIFOs, while in the other direction, the hardware may trigger the Drivers through a set of interrupts (iden-

tified by the RTOS, and directed to the appropriate Driver routines).

7.5 JTAG Interface

The JTAG interface is compliant with the JTAG IEEE Std 1149.1. Its allows both the boundary scan of the

digital pins and the debug of the ARM7TDMI application when connected with the standard ARM7 devel-

opment tools.

7.6 RF Interface

The STLC2410B radio interface is compatible to BlueRF (unidirectional RxMode2 for data and unidirec-

tional serial interface for control).

7.7 PCM voice interface

The voice interface is a direct PCM interface to connect to a standard CODEC (e.g. STw5093 or

STw5094) including internal decimator and interpolator filters. The data can be linear PCM (13-16bit), µ-

Law (8bit) or A-Law (8bit). By default the codec interface is configured as master. The encoding on the air

interface is programmable to be CVSD, A-Law or µ-Law.

The PCM block is able to manage the PCM bus with up to 3 timeslots.

PCM clock and data are in master mode available at 2 MHz or at 2.048 MHz to allow interfacing of stan-

dard codecs.

HCI

USB TRANSPORT LAYER

UART TRANSPORT LAYER

RTOS

STLC2410B HW

USB DRIVER

SERIAL DRIVER

UART

DEVICE

REGISTERS

FIFOs

USB

DEVICE

REGISTERS

FIFOs

IRQ

IRQ

D02TL555