STLC2410B datasheet(9/20 Pages) STMICROELECTRONICS

9 / 20 page

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STLC2410B

(1) Should be strapped to vssio if not used

(2) Should be strapped to vddio if not used

(3) Should have a 10 kOhm pull-up if not used.

JTAG interface

ntrst

JTAG pin

CMOS, 3.3V TTL

compatible

tck

JTAG pin

(1)

CMOS, 3.3V TTL

compatible

schmitt trigger

tms

JTAG pin

CMOS, 3.3V TTL

compatible

tdi

JTAG pin

tdo

JTAG pin (should be left open)

O/t

CMOS, 3.3V TTL

compatible, 2mA

slew rate control

PCM interface

pcm_a

PCM data

I/O

CMOS, 3.3V TTL

compatible, 2mA

tristate

slew rate control

pcm_b

PCM data

I/O

pcm_sync

PCM 8kHz sync

I/O

pcm_clk

PCM clock

I/O

CMOS, 3.3V TTL

compatible, 2mA

tristate

slew rate control

schmitt trigger

Radio interface

brclk

B10

Transmit clock

(1)

CMOS, 3.3V TTL

compatible

schmitt trigger

brxd

A10

Receive data

bmiso

RF serial interface input data

(1)

CMOS, 3.3V TTL

compatible

bnden

RF serial interface control

CMOS, 3.3V TTL

compatible, 2mA

slew rate control

bmosi

RF serial interface output data

bdclk

RF serial interface clock

btxd

Transmit data

bsen

Synthesizer ON

bpaen

Open PLL

brxen

Receive ON

btxen

Transmit ON

bpktctl

Packet ON

ant_sw

Antenna switch

CMOS, 3.3V TTL

compatible, 8mA

slew rate control

Table 8. Pin List (continued)

Name

Pin #

Description

DIR

PU/PD

VDD

PAD

STLC2410B Datasheet(PDF) 9 Page - STMicroelectronics

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