MPC8314VRADDA datasheet(71/101 Pages) FREESCALE

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MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

TDM

21.2

TDM AC Electrical Characteristics

This table provides the TDM AC timing specifications.

This figure shows the TDM receive signal timing.

Figure 57. TDM Receive Signals

Table 65. TDM AC Timing specifications

Parameter/Condition

Symbol

Min

Max

Unit

TDMxRCK/TDMxTCK

tDM

20.0

—

TDMxRCK/TDMxTCK high pulse width

tDM_HIGH

8.0

—

TDMxRCK/TDMxTCK low pulse width

tDM_LOW

8.0

—

TDMxRCK/TDMxTCK rise time (20% to 80%)

tDMKH

1.0

4.0

TDMxRCK/TDMxTCK fall time (80% to 20%)

tDMKL

1.0

4.0

TDM all input setup time

tDMIVKH

3.0

—

TDMxRD hold time

tDMRDIXKH

3.5

—

TDMxTFS/TDMxRFS input hold time

tDMFSIXKH

2.0

—

TDMxTCK High to TDMxTD output active

tDM_OUTAC

4.0

—

TDMxTCK High to TDMxTD output valid

tDMTKHOV

—

14.0

TDMxTD hold time

tDMTKHOX

2.0

—

TDMxTCK High to TDMxTD output high impedance

tDM_OUTHI

—

10.0

TDMxTFS/TDMxRFS output valid

tDMFSKHOV

—

13.5

TDMxTFS/TDMxRFS output hold time

tDMFSKHOX

2.5

—

Note:

1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state) for

inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTDMIVKH symbolizes TDM timing

(DM) with respect to the time the input signals (I) reach the valid state (V) relative to the TDM Clock, tTC, reference (K) going to

the high (H) state or setup time. Also, output signals (O), hold (X).

2. Output values are based on 30 pF capacitive load.

3. Inputs are referenced to the sampling that the TDM is programmed to use. Outputs are referenced to the programming edge

they are programmed to use. Use of the rising edge or falling edge as a reference is programmable. TDMxTCK and TDMxRCK

are shown using the rising edge.

TDMxRCK

TDMxRD

TDMxRFS

TDMxRFS (output)

tDM

tDM_HIGH

tDM_LOW

tDMIVKH

tDMRDIXKH

tDMFSIXKH

tDMFSKHOV

tDMFSKHOX

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