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MPC5601DXLL Datasheet(PDF) 36 Page - Freescale Semiconductor, Inc |
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MPC5601DXLL Datasheet(HTML) 36 Page - Freescale Semiconductor, Inc |
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36 / 77 page ![]() MPC5602D Microcontroller Data Sheet, Rev. 3.1 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 36 4.9 Power management electrical characteristics 4.9.1 Voltage regulator electrical characteristics The device implements an internal voltage regulator to generate the low voltage core supply VDD_LV from the high voltage ballast supply VDD_BV. The regulator itself is supplied by the common I/O supply VDD. The following supplies are involved: • HV: High voltage external power supply for voltage regulator module. This must be provided externally through VDD power pin. • BV: High voltage external power supply for internal ballast module. This must be provided externally through VDD_BV power pin. Voltage values should be aligned with VDD. • LV: Low voltage internal power supply for core, FMPLL and Flash digital logic. This is generated by the internal voltage regulator but provided outside to connect stability capacitor. It is further split into four main domains to ensure noise isolation between critical LV modules within the device: — LV_COR: Low voltage supply for the core. It is also used to provide supply for FMPLL through double bonding. — LV_CFLA: Low voltage supply for Code Flash module. It is supplied with dedicated ballast and shorted to LV_COR through double bonding. — LV_DFLA: Low voltage supply for Data Flash module. It is supplied with dedicated ballast and shorted to LV_COR through double bonding. — LV_PLL: Low voltage supply for FMPLL. It is shorted to LV_COR through double bonding. Figure 7. Voltage regulator capacitance connection The internal voltage regulator requires external capacitance (CREGn) to be connected to the device in order to provide a stable low voltage digital supply to the device. Capacitances should be placed on the board as near as possible to the associated pins. Care should also be taken to limit the serial inductance of the board to less than 5 nH. DEVICE VSS_LV VDD_BV VDD_LV VSS_LV VDD_LV VDD VSS_LV VDD_LV CREG2 (LV_COR/LV_CFLA) CREG3 (LV_COR/LV_PLL) CDEC2 (supply/IO decoupling) DEVICE VDD_BV I VDD_LVn VREF VDD Voltage Regulator VSS VSS_LVn GND GND GND GND |
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