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MMA6901K Datasheet(PDF) 8 Page - Freescale Semiconductor, Inc |
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MMA6901K Datasheet(HTML) 8 Page - Freescale Semiconductor, Inc |
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8 / 36 page ![]() Sensors 8 Freescale Semiconductor MMA690xQ 2.1.1 Device Serial Number A unique serial number is programmed into each device during manufacturing. The serial number is composed of the following information. Lot numbers begin at 1 for all devices produced and are sequentially assigned. Serial numbers begin at 1 for each lot, and are sequentially assigned. No lot will contain more devices than can be uniquely identified by the 13-bit serial number. Not all allow- able lot numbers and serial numbers will be assigned. 2.1.2 Full-Scale Range Full-scale range is indicated by the value programmed into DEVCFG0 and DEVCFG1. Ranges for defined part numbers are shown in Table 2-3 below. 2.1.3 Device Control Register (DEVCTL) A read-write register at address $0E supports a number of device control operations as described in the following. Reserved bits within DEVCTL are always read as logic ‘0’ values. Write operations involving DEVCTL are effective approximately 1.0 μs following negation of CS/RESET. This delay must be considered if successive SPI operations involving write to DEVCTL followed by acceleration data read are conducted in the min- imum allowed transfer timing, as the acceleration result may indicate lingering self-test or error status conditions. It is therefore recommended that acceleration data read operations be delayed by at least 1.2 μs following writes to DEVCTL. 2.1.3.1 Reset Control (RES_1, RES_0) A specific series of three write operations involving these two bits will cause the internal digital circuitry to be reset. The state of the remaining bits in the DEVCTL register do not affect the reset sequence, however any write operation involving this register in which both RES_1 and RES_0 are cleared will terminate the sequence. To reset the internal digital circuitry, the following register write operations must be performed in the order shown: 1. Set RES1. RES0 must remain cleared. 2. Set RES1 and RES0. 3. Clear RES1 and set RES0. RES1 and RES0 are always read as logic ‘0’ values. Table 2-2. Serial Number Assignment Bit Function Bit Range Content SN12 - SN0 Serial Number SN31 - SN13 Lot Number Table 2-3. Full-Scale Range Part Number Register Range Bits Full-Scale Range (g) RNG[3] RNG[2] RNG[1] RNG[0] MMA6900Q DEVCFG0 0000 3.5 DEVCFG1 0000 3.5 MMA6901Q DEVCFG0 0101 5.0 DEVCFG1 0101 5.0 Table 2-4. Device Control Register Address Register Bit 7 6 5 4 3 2 1 0 $0E DEVCTL RES1 RES0 CE PCM_EN HPFB YINV ST1 ST0 |
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