SDA

SCL

S

P

Start Condition

Stop Condition

SDA

SCL

Data Line

Change

Data Output

by Transmitter

SCL From

Master

Start

Condition

S

1

2

8

9

Data Output

by Receiver

Clock Pulse for

Acknowledgment

NACK

ACK

PCA9557

A master receiver signals an end of data to the slave transmitter by not generating an acknowledge (NACK) after

the last byte has been clocked out of the slave. This is done by the master receiver by holding the SDA line high.

In this event, the transmitter must release the data line to enable the master to generate a stop condition.

Figure 1. Definition of Start and Stop Conditions

Figure 2. Bit Transfer

Interface Definition

BIT

BYTE

7 (MSB)

6

5

4

3

2

1

0 (LSB)

L

L

H

H

A2

A1

A0

R/W

Px I/O data bus

P7

P6

P5

P4

P3

P2

P1

P0

6

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