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M30620FCAFP Datasheet(PDF) 550 Page - Renesas Technology Corp

Part # M30620FCAFP
Description  16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
PDF  615 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M30620FCAFP Datasheet(HTML) 550 Page - Renesas Technology Corp

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External Buses
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2-233
(b) Vcc = 3V
• With the Wait option cleared
ta(S) < 109/f(BCLK) – 140(ns)*
• With the Wait option selected
ta(S) < 2 X109/f(BCLK) – 140(ns)*
* 140(ns) = td(BCLK – CS) + tsu(DB – RD) – th(BCLK – RD)
= (chip select output delay time) + (data input setup time) – (RD signal output hold time)
(4) Output enable time [ta(OE)]
Output enable time [ta(OE)] must satisfy the following conditional expressions:
(a) Vcc = 5V
• With the Wait option cleared
ta(OE) < 109/(f(BCLK) X 2) – 45(ns) = tac1(RD-DB)
• With the Wait option selected
ta(OE) < 3 X 109/(f(BCLK) X 2) – 45(ns) = tac2(RD-DB)
(b) Vcc = 3V
• With the Wait option cleared
ta(OE) < 109/(f(BCLK) X 2) – 90(ns) = tac1(RD-DB)
• With the Wait option selected
ta(OE) < 3X109/(f(BCLK) X 2) – 90(ns) = tac2(RD-DB)
(5) Data setup time [tsu(D)]
Data setup time [tsu(D)] must satisfy the following conditional expressions:
(a) Vcc = 5V
• With the Wait option cleared
tsu(D) < 109/(f(BCLK) X 2) – 40(ns)*
• With the Wait option selected
tsu(D) < 109/f(BCLK) – 40(ns)*
* 40(ns)
= td(BCLK – DB) – th(BCLK – WR)
= (data output delay time) – (WR signal output hold time)
(b) Vcc = 3V
• With the Wait option cleared
tsu(D) < 109/(f(BCLK) X 2) – 80(ns)*
• With the Wait option selected
tsu(D) < 109/f(BCLK) – 80(ns)*
* 80(ns)
= td(BCLK – DB) – th(BCLK – WR)
= (data output delay time) – (WR signal output hold time)



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