M30620FCAFP datasheet(498/615 Pages) RENESAS

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Programmable I/O Ports

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

2-181

2.16 Programmable I/O Ports Usage

2.16.1 Overview of the programmable I/O ports usage

Eighty-seven programmable I/O ports and one input-only port are available. I/O pins also serve as I/O

pins for built-in peripheral functions.

Each port has a direction register that defines the I/O direction and also has a port register for I/O data. In

addition, each port has a pull-up control register that defines pull-up in terms of 4 bits. The input-only port

has neither direction register nor pull-up control bit.

The following is an overview of the programmable I/O ports usage:

(1) Writing to a port register

With the direction register set to output, the level of the written values from each relevant pin is output

by writing to a port register. The output level conforms to CMOS output. Port P70 and P71 are N

channel open drain. Writing to the port register, with the direction register set to input, inputs a value

to the port register, but nothing is output to the relevant pins. The output level remains floating.

In memory expansion and microprocessor mode, the contents of corresponding port and direction

_______

_____

________ ______

________ _______

_______

__________

registers of pins A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD,

_________

HLDA and BCLK cannot be modified.

(2) Reading a port register

With the direction register set to output, reading a port register takes out the content of the port regis-

ter, not the content of the pin. With the direction register set to input, reading the port register takes out

the content of the pin.

(3) Effect of the protection register

Data written to the direction register of P9 is affected by the protection register. The direction register

of P9 cannot be easily rewritten.

(4) Input-only port

_______

P85 is used as the input-only port, it also serves as NMI. P85 has no direction register. Pull-up cannot

_______

be set to this port. As NMI cannot be disabled, an NMI interrupt occurs if a falling edge is input to P85.

Use P85 for reading the level input at this time only.

(5) Setting pull-up

The pull-up control bit allows setting of the pull-up, in terms of 4 bits, either in use or not in use. For the

four bits chosen, pull-up is effective only in the ports whose direction register is set to input. Pull-up is

not effective in ports whose direction register is set to output.

Do not set pull-up of corresponding pin when XCIN/XCOUT is set or a port is used as A-D input.

Pull-up can be set for P0 to P3, P40 to P43, P5 in only single-chip mode. Pull-up cannot be set for P0

to P3, P40 to P43, P5 in memory expansion and microprocessor modes. The contents of register can

be changed, but the pull-up resistance is not connected.

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