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M30620FCAFP Datasheet(PDF) 445 Page - Renesas Technology Corp |
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M30620FCAFP Datasheet(HTML) 445 Page - Renesas Technology Corp |
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445 / 615 page ![]() A-D Converter Mitsubishi microcomputers M16C / 62A Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 2-128 In repeat sweep 0 mode, choose functions from those listed in Table 2.7.8. Operations of the circled items are described below. Figure 2.7.17 shows timing chart, and Figure 2.7.18 shows the set-up procedure. 2.7.8 Operation of A-D Converter (in repeat sweep mode 0) Item Item Set-up Set-up Operation clock AD Divided-by-4 fAD / divided- by-2 fAD / fAD 8-bit / 10-bit External ope-amp connection mode Expanded analog input pin Not used O O Resolution Analog input pin AN0 and AN1 (2 pins) / AN0 to AN3 (4 pins) / AN0 to AN5 (6 pins) / AN0 to AN7 (8 pins) O O Software trigger Trigger for starting A-D conversion O Trigger by ADTRG Sample & Hold Not activated Activated O Operation Table 2.7.8. Choosed functions (1) Setting the A-D conversion start flag to “1” causes the A-D converter to start the conversion on voltage input to the AN0 pin. (2) After the A-D conversion of voltage input to the AN0 pin is completed, the content of the successive comparison register (conversion result) is transmitted to A-D register 0. (3) The A-D converter converts all pins selected by the user. The conversion result is transmitted to A-D register i corresponding to each pin every time A-D conversion on the pin is com- pleted. The A-D conversion interrupt request bit does not go to “1”. (4) The A-D converter continues operating until the A-D conversion start flag is set to “0” by software. (2) AN1 conversion begins after AN0 conversion is complete A-D conversion start flag “1” “0” A-D register 0 A-D register 1 φAD A-D register i Result Result Result 8-bit resolution : 28 φAD cycles 10-bit resolution : 33 φAD cycles 8-bit resolution : 28 φAD cycles 10-bit resolution : 33 φAD cycles (3) Consecutive conversion A-D conversion is complete (1) Start A-D conversion Set to “1” by software. Cleared to “0” by software Note: When φAD frequency is less than 1MHZ, sample and hold function cannot be selected. Conversion rate per analog input pin is 49 φAD cycles for 8-bit resolution and 59 φAD cycles for 10-bit resolution. (4) Figure 2.7.17. Operation timing of repeat sweep 0 mode |
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