M30620FCAFP datasheet(441/615 Pages) RENESAS

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A-D Converter

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

2-124

In repeat mode, choose functions from those listed in Table 2.7.6. Operations of the circled items are

described below. Figure 2.7.13 shows timing chart, and Figure 2.7.14 shows the set-up procedure.

2.7.6 Operation of A-D Converter (in repeat mode)

Item

Set-up

Operation clock

φAD

Divided-by-4 fAD / divided-

by-2 fAD / fAD

8-bit / 10-bit

Software trigger

Sample & Hold

External operation amplifier

connection mode

Not activated

Activated

Expanded analog

input pin

Not used

Either ANEX0 pin or

ANEX1 pin

Resolution

Analog input pin

One of AN0 pin to AN7 pin

Trigger for starting

A-D conversion

Trigger by ADTRG

(1) Setting the A-D conversion start flag to “1” causes the A-D converter to start operating.

(2) After the first conversion is completed, the content of the successive comparison register

(conversion result) is transmitted to A-D register i. The A-D conversion interrupt request bit

does not go to “1”.

(3) The A-D converter continues operating until the A-D conversion start flag is set to “0” by

software. The conversion result is transmitted to A-D register i every time a conversion is

completed.

Table 2.7.6. Choosed functions

Operation

Figure 2.7.13. Operation timing of repeat mode

A-D conversion

start flag

“1”

“0”

A-D register i

Result

Set to “1” by software

φAD

8-bit resolution : 28

φAD cycles

10-bit resolution : 33

φAD cycles

(1) Start A-D conversion

(2) Conversion result is transferred to the A-D register

(3) A-D conversion

is complete

Cleared to “0” by software

A-D conversion

Result

Stop

Convert

Stop

Note: When φAD frequency is less than 1MHz, sample and hold function cannot be selected.

Conversion rate per analog input pin is 49

φAD cycles for 8-bit resolution and 59 φAD cycles

for 10-bit resolution.

8-bit resolution : 28

φAD cycles

10-bit resolution : 33

φAD cycles

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