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M30620FCAFP Datasheet(PDF) 439 Page - Renesas Technology Corp |
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M30620FCAFP Datasheet(HTML) 439 Page - Renesas Technology Corp |
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439 / 615 page ![]() A-D Converter Mitsubishi microcomputers M16C / 62A Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 2-122 In one-shot mode, choose functions from those listed in Table 2.7.5. Operations of the circled items are described below. Figure 2.7.11 shows timing chart, and Figure 2.7.12 shows the set-up procedure. 2.7.5 Operation of A-D Converter (in one-shot mode, external op-amp connection mode selected) Item Item Set-up Set-up Operation clock φAD Divided-by-4 fAD / divided- by-2 fAD / fAD 8-bit / 10-bit Software trigger Sample & Hold External operation amplifier connection mode Not activated Activated Expanded analog input pin Not used Either ANEX0 pin or ANEX1 pin O O O Resolution Analog input pin One of AN0 pin to AN7 pin Trigger for starting A-D conversion O O O Trigger by ADTRG Table 2.7.5. Choosed functions Operation (1) Setting the A-D conversion start flag to “1” causes voltage input to the ANi pin to be output from the ANEX0 pin. The A-D conversion is carried out on voltage input to the ANEX1 pin (connect an operation amplifier between the ANEX0 pin and the ANEX1 pin). (2) After the A-D conversion is completed, the content of the successive comparison register (conversion result) is transmitted to A-D register i corresponding to the ANi pin. At this time, the A-D conversion interrupt request bit goes to “1”. Example of wiring Example of operation AN0 AN1 ANEX0 ANEX1 Op-amp Input voltage Input voltage Microcomputer A-D register i Result φAD A-D conversion start flag “1” “0” Set to “1” by software A-D conversion interrupt request “1” “0” Cleared to “0” when interrupt request is accepted, or cleared by software 8-bit resolution : 28 φAD cycles 10-bit resolution : 33 φAD cycles (1) Start A-D conversion (2) A-D conversion is complete Note: When φAD frequency is less than 1MHZ, sample and hold function cannot be selected. Conversion rate per analog input pin is 49 φAD cycles for 8-bit resolution and 59 φAD cycles for 10-bit resolution. Figure 2.7.11. Operation timing of one-shot mode, with external op-amp connection mode selected |
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