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M30620FCAFP Datasheet(PDF) 447 Page - Renesas Technology Corp |
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M30620FCAFP Datasheet(HTML) 447 Page - Renesas Technology Corp |
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447 / 615 page  A-D Converter Mitsubishi microcomputers M16C / 62A Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 2-130 A-D conversion start flag “1” “0” A-D register 0 A-D register 1 φAD A-D register 2 Result Result Result Set to “1” by software Result Cleared to “0” by software (2) (3) Consecutive conversion 8-bit resolution : 28 φAD cycles 10-bit resolution : 33 φAD cycles A-D conversion is complete (4) Conversion result is transfered to A-D conversion register 0 Note: When φAD frequency is less than 1MHz, sample and hold function cannot be selected. Conversion rate per analog input pin is 49 φAD cycles for 8-bit resolution and 59 φAD cycles for 10-bit resolution. 8-bit resolution : 28 φAD cycles 10-bit resolution : 33 φAD cycles 8-bit resolution : 28 φAD cycles 10-bit resolution : 33 φAD cycles 8-bit resolution : 28 φAD cycles 10-bit resolution : 33 φAD cycles (1) Start AN0 pin conversion 2.7.9 Operation of A-D Converter (in repeat sweep mode 1) Figure 2.7.20. Operation timing of repeat sweep 1 mode In repeat sweep 1 mode, choose functions from those listed in Table 2.7.9. Operations of the circled items are described below. Figure 2.7.19 shows ANi pin's sweep sequence, Figure 2.7.20 shows timing chart, and Figure 2.7.21 shows the set-up procedure. Operation (1) Setting the A-D conversion start flag to “1” causes the A-D converter to start the conversion on voltage input to the AN0 pin. (2) After the A-D conversion on voltage input to the AN0 pin is completed, the content of the successive comparison register (conversion result) is transmitted to A-D register 0. (3) Every time the A-D converter carries out A-D conversion on a selected analog input pin, the A-D converter carries out A-D conversion on only one unselected pin, and then the A-D converter carries out A-D conver- sion from the AN0 pin again. (See Figure 2.7.19.) The conversion result is transmitted to A-D register i every time conversion on a pin is completed. The A-D conversion interrupt request bit does not go to “1”. (4) The A-D converter continues operating until software goes the A-D convers ion start flag to “0”. Table 2.7.9. Choosed functions Item Item Set-up Set-up Operation clock φAD Divided-by-4 fAD / divided- by-2 fAD / fAD 8-bit / 10-bit External ope-amp connection mode Expanded analog input pin Not used O O Resolution Analog input pin An0 (1 pin) / AN0 and AN1 (2 pins) / AN0 to AN2 (3 pins) / AN0 to AN3 (4 pins) O O Software trigger Trigger for starting A-D conversion O Trigger by ADTRG Sample & Hold Not activated Activated O Figure 2.7.19. ANi pin's sweep sequence in repeat sweep mode When AN0 is selected Time 00 00000000 1 2 3 4 5 6 7 1 2 . . . When AN0, AN1 are selected Time 0000000 1111111 2 3 4 5 6 7 . . . 0 2 Time 0000000 222222 3 4 5 6 7 . . . 3 111111 When AN0 to AN2 are selected Time 000000 3333 2 4 5 6 7 . . . 11111 2222 3 4 When AN0 to AN3 are selected |
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