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H8SX1663 Datasheet(PDF) 639 Page - Renesas Technology Corp

Part # H8SX1663
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 Datasheet(HTML) 639 Page - Renesas Technology Corp

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Section 11 Programmable Pulse Generator (PPG)
Rev.1.00 Jun. 07, 2006 Page 587 of 1102
REJ09B0294-0100
11.3.2
Output Data Registers H, L (PODRH, PODRL)
PODRH and PODRL store output data for use in pulse output. A bit that has been set for pulse
output by NDER is read-only and cannot be modified.
• PODRH
7
POD15
0
R/W
6
POD14
0
R/W
5
POD13
0
R/W
4
POD12
0
R/W
3
POD11
0
R/W
2
POD10
0
R/W
1
POD9
0
R/W
0
POD8
0
R/W
Bit
Bit Name
Initial Value
R/W
• PODRL
7
POD7
0
R/W
6
POD6
0
R/W
5
POD5
0
R/W
4
POD4
0
R/W
3
POD3
0
R/W
2
POD2
0
R/W
1
POD1
0
R/W
0
POD0
0
R/W
Bit
Bit Name
Initial Value
R/W
• PODRH
Bit
Bit Name
Initial
Value
R/W
Description
7
6
5
4
3
2
1
0
POD15
POD14
POD13
POD12
POD11
POD10
POD9
POD8
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Output Data Register 15 to 8
For bits which have been set to pulse output by NDERH,
the output trigger transfers NDRH values to this register
during PPG operation. While NDERH is set to 1, the CPU
cannot write to this register. While NDERH is cleared, the
initial output value of the pulse can be set.



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