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HD6432138SW Datasheet(PDF) 301 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 301 Page - Renesas Technology Corp |
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301 / 1061 page ![]() Section 9 8-Bit PWM Timers [H8S/2138 Group] Rev. 4.00 Jun 06, 2006 page 247 of 1004 REJ09B0301-0400 PWDPR is initialized to H'00 by a reset and in hardware standby mode. OS Description 0 PWM direct output (PWDR value corresponds to high width of output) (Initial value) 1 PWM inverted output (PWDR value corresponds to low width of output) 9.2.4 PWM Output Enable Registers A and B (PWOERA and PWOERB) PWOERA Bit Initial value Read/Write 7 OE7 0 R/W 6 OE6 0 R/W 5 OE5 0 R/W 4 OE4 0 R/W 3 OE3 0 R/W 0 OE0 0 R/W 2 OE2 0 R/W 1 OE1 0 R/W PWOERB Bit Initial value Read/Write 7 OE15 0 R/W 6 OE14 0 R/W 5 OE13 0 R/W 4 OE12 0 R/W 3 OE11 0 R/W 0 OE8 0 R/W 2 OE10 0 R/W 1 OE9 0 R/W Each PWOER is an 8-bit readable/writable register that switches between PWM output and port output. Bits OE15 to OE0 correspond to outputs PW15 to PW0. To set a pin in the output state, a setting in the port direction register is also necessary. Bits P17DDR to P10DDR correspond to outputs PW7 to PW0, and bits P27DDR to P20DDR correspond to outputs PW15 to PW8. PWOER is initialized to H'00 by a reset and in hardware standby mode. DDR OE Description 0 0 Port input (Initial value) 1 Port input 1 0 Port output or PWM 256/256 output 1 PWM output (0 to 255/256 output) |
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