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HD6432138SW Datasheet(PDF) 236 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 236 Page - Renesas Technology Corp |
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236 / 1061 page  Section 7 Data Transfer Controller [H8S/2138 Group] Rev. 4.00 Jun 06, 2006 page 182 of 1004 REJ09B0301-0400 Read Write Read Write Address φ DTC activation request DTC request Data transfer Data transfer Transfer information write Transfer information write Transfer information read Transfer information read Vector read Figure 7.12 DTC Operation Timing (Chain Transfer) 7.3.10 Number of DTC Execution States Table 7.8 lists execution phases for a single DTC data transfer, and table 7.9 shows the number of states required for each execution phase. Table 7.8 DTC Execution Phases Mode Vector Read I Register Information Read/Write J Data Read K Data Write L Internal Operation M Normal 1 6 1 1 3 Repeat 1 6 1 1 3 Block transfer 1 6 N N 3 N: Block size (initial setting of CRAH and CRAL) |
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