HD6432138SW datasheet(225/1061 Pages) RENESAS

225 / 1061 page

Section 7 Data Transfer Controller [H8S/2138 Group]

Rev. 4.00 Jun 06, 2006 page 171 of 1004

REJ09B0301-0400

7.3.2

Activation Sources

The DTC operates when activated by an interrupt or by a write to DTVECR by software (software

activation). An interrupt request can be directed to the CPU or DTC, as designated by the

corresponding DTCER bit. The interrupt request is directed to the DTC when the corresponding

bit is set to 1, and to the CPU when the bit is cleared to 0.

At the end of one data transfer (or the last of the consecutive transfers in the case of chain transfer)

the interrupt source or the corresponding DTCER bit is cleared. Table 7.3 shows activation

sources and DTCER clearing.

The interrupt source flag for RXI0, for example, is the RDRF flag in SCI0.

Table 7.3

Activation Sources and DTCER Clearing

Activation

Source

When DISEL Bit Is 0 and

Specified Number of Transfers

Have Not Ended

When DISEL Bit Is 1 or

Specified Number of Transfers

Have Ended

Software

activation

SWDTE bit cleared to 0

• SWDTE bit held at 1

• Interrupt request sent to CPU

Interrupt

activation

• Corresponding DTCER bit held

at 1

• Activation source flag cleared

to 0

• Corresponding DTCER bit cleared to 0

• Activation source flag held at 1

• Activation source interrupt request

sent to CPU

Figure 7.3 shows a block diagram of activation source control. For details see section 5, Interrupt

Controller.

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