HD6432138SW datasheet(725/1061 Pages) RENESAS

Part #	HD6432138SW

Description	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1061 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 23 Clock Pulse Generator

Rev. 4.00 Jun 06, 2006 page 671 of 1004

REJ09B0301-0400

Bit 2

Bit 1

Bit 0

SCK2

SCK1

SCK0

Description

Bus master is in high-speed mode

(Initial value)

Medium-speed clock is

φ/2

Medium-speed clock is

φ/4

Medium-speed clock is

φ/8

Medium-speed clock is

φ/16

Medium-speed clock is

φ/32

1—

—

23.2.2

Low-Power Control Register (LPWRCR)

DTON

R/W

LSON

R/W

NESEL

R/W

EXCLE

R/W

—

Bit

Initial value

Read/Write

LPWRCR is an 8-bit readable/writable register that performs power-down mode control.

Only bit 4 is described here. For a description of the other bits, see section 24.2.2, Low-Power

Control Register (LPWRCR).

LPWRCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in

software standby mode.

Bit 4—Subclock Input Enable (EXCLE): Controls subclock input from the EXCL pin.

Bit 4

EXCLE

Description

Subclock input from EXCL pin is disabled

(Initial value)

Subclock input from EXCL pin is enabled

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