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HD6432138SW Datasheet(PDF) 665 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 665 Page - Renesas Technology Corp |
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665 / 1061 page ![]() Section 21 ROM (Mask ROM Version, H8S/2138 F-ZTAT, H8S/2134 F-ZTAT, and H8S/2132 F-ZTAT) Rev. 4.00 Jun 06, 2006 page 611 of 1004 REJ09B0301-0400 Table 21.11 Settings for Each Operating Mode in Programmer Mode Pin Names Mode CE CE CE CE OE OE OE OE WE WE WE WE FO7 to FO0 FA17 to FA0 Read L L H Data output Ain* 2 Output disable L H H Hi-Z X Command write L H L Data input Ain* 2 Chip disable* 1 H XXHi-Z X Notes: 1. Chip disable is not a standby state; internally, it is an operation state. 2. Ain indicates that there is also address input in auto-program mode. Table 21.12 Programmer Mode Commands 1st Cycle 2nd Cycle Command Name Number of Cycles Mode Address Data Mode Address Data Memory read mode 1 + n Write X H'00 Read RA Dout Auto-program mode 129 Write X H'40 Write WA Din Auto-erase mode 2 Write X H'20 Write X H'20 Status read mode 2 Write X H'71 Write X H'71 Notes: 1. In auto-program mode, 129 cycles are required for command writing by a simultaneous 128-byte write. 2. In memory read mode, the number of cycles depends on the number of address write cycles (n). 21.10.4 Memory Read Mode • After the end of an auto-program, auto-erase, or status read operation, the command wait state is entered. To read memory contents, a transition must be made to memory read mode by means of a command write before the read is executed. • Command writes can be performed in memory read mode, just as in the command wait state. • Once memory read mode has been entered, consecutive reads can be performed. • After power-on, memory read mode is entered. |
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