HD6432138SW datasheet(659/1061 Pages) RENESAS

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Section 21 ROM (Mask ROM Version, H8S/2138 F-ZTAT, H8S/2134 F-ZTAT, and H8S/2132 F-ZTAT)

Rev. 4.00 Jun 06, 2006 page 605 of 1004

REJ09B0301-0400

21.8

Flash Memory Protection

There are three kinds of flash memory program/erase protection: hardware protection, software

protection, and error protection.

21.8.1

Hardware Protection

Hardware protection refers to a state in which programming/erasing of flash memory is forcibly

disabled or aborted. Hardware protection is reset by settings in flash memory control registers 1

and 2 (FLMCR1, FLMCR2) and erase block registers 1 and 2 (EBR1, EBR2). (See table 21.8.)

Table 21.8

Hardware Protection

Functions

Item

Description

Program

Erase

Reset/standby

protection

• In a reset (including a WDT overflow reset),

software standby mode, subactive mode,

subsleep mode, and watch mode, FLMCR1,

FLMCR2, EBR1, and EBR2 are initialized, and

the program/erase-protected state is entered.

• In a reset via the RES pin, the reset state is not

entered unless the

RES pin is held low until

oscillation stabilizes after powering on. In the

case of a reset during operation, hold the

RES

pin low for the

RES pulse width specified in the

AC Characteristics section.

Yes

21.8.2

Software Protection

Software protection can be implemented by setting the SWE bit in FLMCR1 and erase block

registers 1 and 2 (EBR1, EBR2). When software protection is in effect, setting the P or E bit in

flash memory control register 1 (FLMCR1) does not cause a transition to program mode or erase

mode. (See table 21.9.)

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