HD6432138SW datasheet(524/1061 Pages) RENESAS

524 / 1061 page

Section 16 I

2C Bus Interface [H8S/2138 Group Option]

Rev. 4.00 Jun 06, 2006 page 470 of 1004

REJ09B0301-0400

Bit 5

Bit 4

MST

TRS

Operating Mode

Slave receive mode

(Initial value)

Slave transmit mode

Master receive mode

Master transmit mode

Bit 5

MST

Description

Slave mode

(Initial value)

[Clearing conditions]

1. When 0 is written by software

2. When bus arbitration is lost after transmission is started in I

2C bus format master

mode

Master mode

[Setting conditions]

1. When 1 is written by software (in cases other than clearing condition 2)

2. When 1 is written in MST after reading MST = 0 (in case of clearing condition 2)

Bit 4

TRS

Description

Receive mode

(Initial value)

[Clearing conditions]

1. When 0 is written by software (in cases other than setting condition 3)

2. When 0 is written in TRS after reading TRS = 1 (in case of clearing condition 3)

3. When bus arbitration is lost after transmission is started in I

2C bus format master

mode

4. When the SW bit in DDCSWR changes from 1 to 0

Transmit mode

[Setting conditions]

1. When 1 is written by software (in cases other than clearing conditions 3 and 4)

2. When 1 is written in TRS after reading TRS = 0 (in case of clearing conditions 3

and 4)

3. When a 1 is received as the R/

W bit of the first frame in I2C bus format slave mode

HD6432138SW Datasheet(PDF) 524 Page - Renesas Technology Corp

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