HD6432138SW datasheet(467/1061 Pages) RENESAS

467 / 1061 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 4.00 Jun 06, 2006 page 413 of 1004

REJ09B0301-0400

Table 15.7

Maximum Bit Rate with External Clock Input (Synchronous Mode)

φφφφ (MHz)

External Input Clock (MHz)

Maximum Bit Rate (bits/s)

0.3333

333333.3

0.6667

666666.7

1.0000

1000000.0

1.3333

1333333.3

1.6667

1666666.7

2.0000

2000000.0

2.3333

2333333.3

2.6667

2666666.7

3.0000

3000000.0

3.3333

3333333.3

15.2.9

Serial Interface Mode Register (SCMR)

—

SDIR

R/W

SMIF

R/W

SINV

R/W

—

Bit

Initial value

Read/Write

SCMR is an 8-bit readable/writable register used to select SCI functions.

SCMR is initialized to H'F2 by a reset, and in standby mode, watch mode, subactive mode,

subsleep mode, and module stop mode.

Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.

Bit 3—Data Transfer Direction (SDIR): Selects the serial/parallel conversion format.

Bit 3

SDIR

Description

TDR contents are transmitted LSB-first

(Initial value)

Receive data is stored in RDR LSB-first

TDR contents are transmitted MSB-first

Receive data is stored in RDR MSB-first

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