HD6432138SW datasheet(401/1061 Pages) RENESAS

401 / 1061 page

Section 13 Timer Connection [H8S/2138 Group]

Rev. 4.00 Jun 06, 2006 page 347 of 1004

REJ09B0301-0400

13.2.2

Timer Connection Register O (TCONRO)

Bit

Initial value

Read/Write

HOE

R/W

VOE

R/W

CLOE

R/W

CBOE

R/W

HOINV

R/W

CBOINV

R/W

VOINV

R/W

CLOINV

R/W

TCONRO is an 8-bit readable/writable register that controls output signal output, phase inversion,

etc.

TCONRO is initialized to H'00 by a reset and in hardware standby mode.

Bits 7 and 4—Output Enable (HOE, VOE, CLOE, CBOE): These bits control

enabling/disabling of horizontal synchronization signal (HSYNCO), vertical synchronization

signal (VSYNCO), clamp waveform (CLAMPO), and blanking waveform (CBLANK) output.

When output is disabled, the state of the relevant pin is determined by the port DR and DDR, FRT,

TMR, and PWM settings.

Output enabling/disabling control does not affect the port, FRT, or TMR input functions, but some

FRT and TMR input signal sources are determined by the SCONE bit in TCONRI.

Bit 7

HOE

Description

The P44/TMO1/HIRQ1/HSYNCO pin functions as the P44/TMO1/HIRQ1 pin

(Initial value)

The P44/TMO1/HIRQ1/HSYNCO pin functions as the HSYNCO pin

Bit 6

VOE

Description

The P61/FTOA/

KIN1/CIN1/VSYNCO pin functions as the P61/FTOA/ KIN1/CIN1 pin

(Initial value)

The P61/FTOA/

KIN1/CIN1/VSYNCO pin functions as the VSYNCO pin

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