| Electronic Components Datasheet Search |
|
HD6432138SW Datasheet(PDF) 379 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD6432138SW Datasheet(HTML) 379 Page - Renesas Technology Corp |
|
379 / 1061 page ![]() Section 12 8-Bit Timers Rev. 4.00 Jun 06, 2006 page 325 of 1004 REJ09B0301-0400 12.3 Operation 12.3.1 TCNT Incrementation Timing TCNT is incremented by input clock pulses (either internal or external). Internal Clock: An internal clock created by dividing the system clock ( φ) can be selected by setting bits CKS2 to CKS0 in TCR. Figure 12.2 shows the count timing. φ Internal clock TCNT input clock TCNT N – 1 N N + 1 Figure 12.2 Count Timing for Internal Clock Input External Clock: Three incrementation methods can be selected by setting bits CKS2 to CKS0 in TCR: at the rising edge, the falling edge, and both rising and falling edges. Note that the external clock pulse width must be at least 1.5 states for incrementation at a single edge, and at least 2.5 states for incrementation at both edges. The counter will not increment correctly if the pulse width is less than these values. Figure 12.3 shows the timing of incrementation at both edges of an external clock signal. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |