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HD6432138SW Datasheet(PDF) 365 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 365 Page - Renesas Technology Corp |
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365 / 1061 page ![]() Section 12 8-Bit Timers Rev. 4.00 Jun 06, 2006 page 311 of 1004 REJ09B0301-0400 12.2.3 Time Constant Register B (TCORB) 7 1 R/W 6 1 R/W 5 1 R/W 4 1 R/W 3 1 R/W 0 1 R/W 2 1 R/W 1 1 R/W TCORBX, TCORBY Bit Initial value Read/Write 15 1 R/W Bit Initial value Read/Write 14 1 R/W 13 1 R/W 12 1 R/W 11 1 R/W 10 1 R/W 9 1 R/W 8 1 R/W 7 1 R/W 6 1 R/W 5 1 R/W 4 1 R/W 3 1 R/W 2 1 R/W 1 1 R/W 0 1 R/W TCORB0 TCORB1 TCORB is an 8-bit readable/writable register. TCORB0 and TCORB1 comprise a single 16-bit register, so they can be accessed together by word access. TCORB is continually compared with the value in TCNT. When a match is detected, the corresponding compare-match flag B (CMFB) in TCSR is set. Note, however, that comparison is disabled during the T2 state of a TCORB write cycle. The timer output can be freely controlled by these compare-match signals and the settings of output select bits OS3 and OS2 in TCSR. TCORB is initialized to H'FF by a reset and in hardware standby mode. |
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