Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

R5F64110DFB Datasheet(PDF) 84 Page - Renesas Technology Corp

Part # R5F64110DFB
Description  RENESAS MCU
PDF  84 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F64110DFB Datasheet(HTML) 84 Page - Renesas Technology Corp

Back Button R5F64110DFB Datasheet HTML 76Page - Renesas Technology Corp R5F64110DFB Datasheet HTML 77Page - Renesas Technology Corp R5F64110DFB Datasheet HTML 78Page - Renesas Technology Corp R5F64110DFB Datasheet HTML 79Page - Renesas Technology Corp R5F64110DFB Datasheet HTML 80Page - Renesas Technology Corp R5F64110DFB Datasheet HTML 81Page - Renesas Technology Corp R5F64110DFB Datasheet HTML 82Page - Renesas Technology Corp R5F64110DFB Datasheet HTML 83Page - Renesas Technology Corp R5F64110DFB Datasheet HTML 84Page - Renesas Technology Corp  
Zoom Inzoom in Zoom Outzoom out
 84 / 84 page
background image
R01DS0062EJ0130 Rev.1.30
Page 84 of 93
Mar 3, 2014
R32C/111 Group
5. Electrical Characteristics
VCC1 =VCC2 =3.3 V
Timing Requirements (VCC1 =VCC2 = 3.0 to 3.6 V, VSS =0 V, and Ta =Topr, unless otherwise noted)
Table 5.53
Serial Interface
Symbol
Characteristic
Value
Unit
Min.
Max.
tc(CK)
CLKi input clock cycle time
200
ns
tw(CKH)
CLKi input high level pulse width
80
ns
tw(CKL)
CLKi input low level pulse width
80
ns
tsu(D-C)
RXDi input setup time
80
ns
th(C-D)
RXDi input hold time
90
ns
Table 5.54
A/D Trigger Input
Symbol
Characteristic
Value
Unit
Min.
Max.
tw(ADH)
ADTRG input high level pulse width
Hardware trigger input high level pulse width
ns
tw(ADL)
ADTRG input low level pulse width
Hardware trigger input high level pulse width
125
ns
Table 5.55
External Interrupt
INTi Input
Symbol
Characteristic
Value
Unit
Min.
Max.
tw(INH)
INTi input high level pulse width
Edge sensitive
250
ns
Level sensitive
tc(CPU) + 200
ns
tw(INL)
INTi input low level pulse width
Edge sensitive
250
ns
Level sensitive
tc(CPU) + 200
ns
Table 5.56
Intelligent I/O
Symbol
Characteristic
Value
Unit
Min.
Max.
tc(ISCLK2)
ISCLK2 input clock cycle time
600
ns
tw(ISCLK2H)
ISCLK2 input high level pulse width
270
ns
tw(ISCLK2L)
ISCLK2 input low level pulse width
270
ns
tsu(RXD-ISCLK2) ISRXD2 input setup time
150
ns
th(ISCLK2-RXD) ISRXD2 input hold time
100
ns
3
AD
----------



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link to Datasheet   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com