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R5F64110DFB Datasheet(PDF) 79 Page - Renesas Technology Corp |
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R5F64110DFB Datasheet(HTML) 79 Page - Renesas Technology Corp |
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79 / 84 page ![]() R01DS0062EJ0130 Rev.1.30 Page 79 of 93 Mar 3, 2014 R32C/111 Group 5. Electrical Characteristics VCC1 =VCC2 =3.3 V Note: 1. Pins AN0_4 to AN0_7, ANEX0, and ANEX1 are available in the 100-pin package only. Table 5.41 A/D Conversion Characteristics (VCC1 =VCC2 =AVCC =VREF = 3.0 to 3.6 V, VSS =AVSS =0 V, Ta =Topr, and f(BCLK) = 25 MHz, unless otherwise noted) Symbol Characteristic Measurement Condition Value Unit Min. Typ. Max. — Resolution VREF = VCC1 10 Bits — Absolute error VREF = VCC1 = VCC2 = 3.3 V AN_0 to AN_7, AN0_0toAN0_7, AN2_0toAN2_7, ANEX0, ANEX1 (1) ±5 LSB External op-amp connection mode ±7 LSB INL Integral non-linearity error VREF = VCC1 = VCC2 = 3.3 V AN_0 to AN_7, AN0_0toAN0_7, AN2_0toAN2_7, ANEX0, ANEX1 (1) ±5 LSB External op-amp connection mode ±7 LSB DNL Differential non- linearity error VREF = VCC1 = VCC2 = 3.3 V ±1 LSB —Offset error ±3 LSB — Gain error ±3 LSB RLADDER Resistor ladder VREF = VCC1 420 k tCONV Conversion time (10 bits) AD = 10 MHz, with sample and hold function 3.3 µs tCONV Conversion time (8 bits) AD = 10 MHz, with sample and hold function 2.8 µs tSAMP Sampling time AD = 10 MHz 0.3 µs VIA Analog input voltage 0 VREF V AD Operating clock frequency Without sample and hold function 0.25 10 MHz With sample and hold function 1 10 MHz |
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