FUNCTIONAL DESCRIPTION

The block diagram shows the basic structure of

the devices : the reference, the error amplifier, the

driver, the power PNP, the protection and reset

functions.

The power stage is a Lateral PNP transistor

which allows a very low dropout voltage (typ.

°C, max. 750mV over the full

curve of the dropout voltage as a function of the

junction temperature is shown in Fig. 1 : that is

The current consumption of the devices (quies-

cent current) are maximum 10mA - over full T -

when no load current is required.

The internal antisaturation circuit allows a drastic

reduction in the current peak which takes place

during the start up.

The three gain stages (operational amplifier,

driver and power PNP) require the external ca-

µF) to guarantee the global

stability of the system.

Load dump and field decay protections (

± 80V, t =

300ms), reverse voltage (– 18V) and short circuit

protection, thermal shutdown are the main fea-

tures that make the devices specially suitable for

applications in the automotive enviroment.

µF, ESR < 10Ω,

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Output Voltage

Over Full T Range

4.80

5.00

5.20

V

°C

4.90

5.00

5.10

V

Operating Input Voltage

6

26

V

Line Regulation

210

mV

Load Regulation

15

60

mV

Dropout Voltage

°C

Over Full T Range

0.40

0.55

0.75

V

V

Quiescent Current

°C

5

6.5

110

10

13

180

mA

mA

mA

Temperature Output Voltage

Drift

– 0.5

mV/

°C

SVR

Supply Volt. Rej.

µF;

50

60

dB

Output Short Circuit Current

0.50

0.80

1.50

A

T

TEST CIRCUIT

L4945

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