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ADIN1300BCPZ-R7 Datasheet(PDF) 21 Page - Analog Devices

Part # ADIN1300BCPZ-R7
Description  Robust, Industrial, Low Latency and Low Power 10 Mbps, 100 Mbps, and 1 Gbps Ethernet PHY
PDF  96 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADIN1300BCPZ-R7 Datasheet(HTML) 21 Page - Analog Devices

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Data Sheet
ADIN1300
THEORY OF OPERATION
analog.com
Rev. B | 21 of 96
interface and is being transmitted to the MAC, or during a false
carrier event (in 100BASE-TX mode). The CRS pin indicates the
presence of a carrier to the MAC, while the COL pin is asserted in a
collision condition.
For the transmit interface, the PHY generates a 25 MHz or 2.5 MHz
reference clock on TX_CLK. The MAC transmits data on the TXD_x
transmit pin that is synchronized with TX_CLK. The MAC asserts
the TX_EN pin to indicate to the ADIN1300 that transmission
data is available on the TXD_x transmit data lines. Because the
TX_ER pin is not used in 10BASE-Te mode, and it is only used in
100BASE-TX mode for forward error propagation and for EEE low
power idle (LPI) request, TX_ER is only supported when EEE is
enabled via the hardware configuration pins (see Table 14).
RMII Interface Mode
Figure 24. RMII MAC-PHY Interface Signals
This interface is capable of supporting 10 Mbps and 100 Mbps
data rates. A single 50 MHz reference clock (REF_CLK) is sourced
from the MAC to PHY (or from an external source) to the XTAL_I/
CLK_IN/REF_CLK pin for both the transmit and receive interfaces.
The receive data (RXD_0 pin and RXD_1 pin), transitions syn-
chronously to the reference clock (REF_CLK). The carrier sense/
received data valid signal (CRS_DV) is a combination of the CRS
and RX_DV signals and is asserted while the receive medium is
nonidle. The CRS_DV is asserted asynchronously to REF_CLK
and deasserted synchronously. RX_ER is also synchronous to
REF_CLK, and is asserted when an error is detected in the re-
ceived frame or when a false carrier is detected in 100BASE-TX.
RX_ER assertion on a false carrier can be disabled by software.
The MAC transmits the TXD_0 pin and TXD_1 pin synchronously
to REF_CLK, and asserts TX_EN to indicate to the ADIN1300 that
transmission data is available on the TXD_0 pin and TXD_1 pin
lines.
AUTONEGOTIATION
The ADIN1300 includes autonegotiation capability in accordance
with IEE 802.3 Clause 28, providing a mechanism for exchanging
information between PHYs to allow link partners to agree to a
common mode of operation at the highest supported speed. During
the autonegotiation process, the PHYs advertise their own capabil-
ities and compares to those received from the link partner. The
concluded operating mode is the highest speed capability and
duplex setting common across the two devices.
In the event of the link being dropped, the autonegotiation process
restarts automatically.
Autonegotiation can be restarted by request through a write to the
RESTART_ANEG bit field in the MII register.
The autonegotiation process takes some time to complete, depend-
ing on the number of pages exchanged. Clause 28 of the IEEE
802.3 standard details the timers related to autonegotiation.
Master/Slave Resolution
For 1000BASE-T links, autonegotiation is also used to resolve
master or slave status. The PHY can be configured to prefer
master or slave through the hardware configuration or manually
configured for fixed master or slave through the MSTR_SLV_CON-
TROL register, Bit 11 and Bit 12 (MAN_ MSTR_ADV bit and
MAN_MSTR_SLV_EN_ADV bit, respectively). If the user chooses
to manually fix this configuration, they must configure each side of
the link differently.
Polarity Inversion Correction
The ADIN1300 is capable of detecting if the proper polarity is
present on the cable and adjust the polarity if not. If polarity
inversion has been detected, it is identified in the PHY_STATUS_1
register (see Table 56).
Automatic MDI Crossover
The ADIN1300 is capable of distinguishing if a straight or cross-
over cable is connected between the link partners. The ADIN1300
automatically detects and sets the MDI configuration to match its
receiver to that of the remote transmitter, thereby avoiding need for
crossover cables or cross-wired cables. Details on the automatic
MDI/MDIX process is included in Clause 40, Section 40.8.2. This
feature is configured through the hardware strapping configuration
(see Table 26) or, alternatively, can be changed through software
access via the MDIO interface.
AUTONEGOTIATION DISABLED
Autonegotiation is always used for a 1000BASE-T link, as required
by the IEEE standards. 10BASE-Te or 100BASE-TX can use or
disable autonegotiation. When autonegotiation is disabled, the PHY
is configured for a single speed and the user must ensure that both
sides of the link are configured properly. See Table 25 for more



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