Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

PC18D21 Datasheet(PDF) 3 Page - ATMEL Corporation

Part # PC18D21
Description  Cell-based ASIC
PDF  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

PC18D21 Datasheet(HTML) 3 Page - ATMEL Corporation

  PC18D21 Datasheet HTML 1Page - ATMEL Corporation PC18D21 Datasheet HTML 2Page - ATMEL Corporation PC18D21 Datasheet HTML 3Page - ATMEL Corporation PC18D21 Datasheet HTML 4Page - ATMEL Corporation PC18D21 Datasheet HTML 5Page - ATMEL Corporation PC18D21 Datasheet HTML 6Page - ATMEL Corporation PC18D21 Datasheet HTML 7Page - ATMEL Corporation PC18D21 Datasheet HTML 8Page - ATMEL Corporation PC18D21 Datasheet HTML 9Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 12 page
background image
3
1389CS–CASIC–06-Nov-06
ATC18 Summary
2.
Standard Cell Library SClib
The Atmel Standard Cell Library, SClib, contains a comprehensive set of combinational logic
and storage cells. The SClib library includes cells which belong to the following categories:
• Buffers and Gates
• Multiplexers
• Flip-flops
• Scan Flip-flops
•Latches
• Adders and Subtractors
2.1
Decoding the Cell Name
Table 2-1 shows the naming conventions for the cells in the SClib library. Each cell name begins
with either a two-, three-, or four-letter code that defines the type of cell. This indicates the range
of standard cells available.
Table 2-1.
Cell Codes
Code
Description
Code
Description
AD
Adder
INVB
Balanced Inverter
AH
Half Adder
INVT
Inverting 3-State Buffer
AS
Adder/Subtractor
LA
D Latch
AN
AND Gate
MI
Inverting Multiplexer
AOI
AND-OR-Invert Gate
MX
Multiplexer
AON
AND-OR-AND-Invert Gates
ND
NAND Gate
AOR
AND-OR Gate
NR
NOR Gate
BH
Bus Holder
OAI
OR-AND-Invert Gate
BUFB
Balanced Buffer
OAN
OR-AND-OR-Invert Gates
BUFF
Non-Inverting Buffer
OR
OR Gate
BUFT
Non-Inverting 3-State Buffer
ORA
OR-AND Gate
CG
Carry Generator
SD
Multiplexed Scan D Flip-Flop
CLK2
Clock Buffer
SE
Multiplexed Scan Enable D Flip-Flop
DE
D-Enabled Flip-Flop
SU
Subtractor
DF
D Flip-Flop
XN
Exclusive NOR Gate
INV0
Inverter
XR
Exclusive OR Gate



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link to Datasheet   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com