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WM8510GEDS/V Datasheet(PDF) 71 Page - Wolfson Microelectronics plc

Part # WM8510GEDS/V
Description  Mono CODEC with Speaker Driver
PDF  81 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8510GEDS/V Datasheet(HTML) 71 Page - Wolfson Microelectronics plc

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Pre-Production
WM8510
w
PD Rev 4.1 December 2006
71
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
… (time doubles with every step)
1010 or
higher
106ms
852ms
6.18s
ALC attack (gain ramp-down) time
(ALCMODE = 1)
Per step
Per 6dB
90% of
range
0000
22.7us
182.4us
1.31ms
0001
45.4us
363us
2.62ms
0010
90.8us
726us
5.23ms
… (time doubles with every step)
0010
1010
23.2ms
186ms
1.34s
8:4
00000
Reserved
3
NGEN
0
ALC Noise gate function enable
1 = enable
0 = disable
Input Limiter /
Automatic Level
Control (ALC)
35 (23h)
2:0
NGTH
000
ALC Noise gate threshold:
000=-39dB
001=-45dB
010=-51db
… (6dB steps)
111=-81dB
Input Limiter /
Automatic Level
Control (ALC)
8:5
0000
Reserved
4
PLLPRESCALE
0
0 = MCLK input not divided (default)
1 = Divide MCLK by 2 before input PLL
Master Clock
and Phase
Locked Loop
(PLL)
36 (24h)
3:0
PLLN[3:0]
1000
Integer (N) part of PLL input/output frequency ratio.
Use values greater than 5 and less than 13.
Master Clock
and Phase
Locked Loop
(PLL)
8:6
000
Reserved
37 (25h)
5:0
PLLK[23:18]
001100
Fractional (K) part of PLL1 input/output frequency ratio
(treat as one 24-digit binary number).
Master Clock
and Phase
Locked Loop
(PLL)
38 (26h)
8:0
PLLK[17:9]
01001001
1
Fractional (K) part of PLL1 input/output frequency ratio
(treat as one 24-digit binary number).
Master Clock
and Phase
Locked Loop
(PLL)
39 (27h)
8:0
PLLK[8:0]
01110100
1
Fractional (K) part of PLL1 input/output frequency ratio
(treat as one 24-digit binary number).
Master Clock
and Phase
Locked Loop
(PLL)
8:3
000000
Reserved
2
MONOATTN
0
Attenuation control for bypass path (output of input
boost stage) to mono mixer input
0 = 0dB
1 = -10dB
Analogue
Outputs
1
SPKATTN
0
Attenuation control for bypass path (output of input
boost stage) to speaker mixer input
0 = 0dB
1 = -10dB
Analogue
Outputs
40 (28h)
0
0
Reserved



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